Testbench components

eVC ARCHITECTURE: eVC is an e Verification Component. It is ready –to-use, configurable verification environment.

       Agents are the key to eVC architecture. Agents are either active or passive. Active  agents are agents that drive DUT signals. Passive agents never drive signals, either because they just monitor an interface within the DUT or because, according to the protocol, no signals ned to be driven.

Types of Agents:

i.        MASTER AGENT: A transmit agent that can send data to the DUT’s receive port. It can be either active or passive.

ii.      SLAVE AGENT: A receive agent that can collect data from the DUT’s transmit port. It can be either active or passive.

Description of all the components :

1. Config.

It decides whether the agent is active or passive

2. Sequence

Sequence is a class which is used to generate some random input, it has the set of random inputs that is stored in seq_lib. Test case is nothing but the set of inputs to test the DUT which forms Sequence library.

3. Sequencer:

A sequencer is an advanced stimulus generator that controls the items that are provided to the driver for execution. By default, a sequencer behaves similarly to a simple stimulus generator and returns a random data item upon request from the driver. This default behavior allows you to add constraints to the data item class in order to control the distribution of randomized values

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5. Driver:

The driver’s role is to drive data items to the bus following the interface protocol. The driver obtains data items from the sequencer for execution. The UVM Class Library provides the uvm_driver base class, from which all driver classes should be extended, either directly or indirectly.

6. Monitor

Monitor is used to sample input and output at DUT ] interfaces.

7. Scoreboard

It generates true output for the random input that is generated by the sequences. As input is detected, data will be added to the scoreboard as a list. When output is detected, it will be compared against scoreboard data in the list.

8. Checker

Checker is used to match the output data with the expected output (to verify the output).

9. Functional Coverage

It checks the functional coverage and tells if the test plan goals have been met.

There are 3 types of functional coverage

Basic item coverage, transition item coverage, cross coverage

a)      Basic Item Coverage: This coverage tells if all legal values of an interesting variable have been covered.

b)      Transition Item Coverage: This coverage is used for state machines which form the control logic for any design. It tells if all legal transitions of a state machine have been covered.

c)       Cross Coverage: This coverage allows to examine the cross product of two or more basic or transition items to check if all interesting combinations of basic and transition items have been covered