What are the differences between SIMULATION and SYNTHESIS
i)Simulation <= verify your design.
Simulation is used to verify the functionality of the circuit.
a)Functional Simulation: a study of ckt's operation independent of timing parameters and gate delays.
b) Timing Simulation: study including estimated delays, verify setup, hold and other timing requirements of devices like flip-flops are met.
ii)Synthesis <= Check for your timing
Synthesis: One of the foremost in back-end steps whereby synthesizing is nothing but converting VHDL or VERILOG description to a set of primitives (equations as in CPLD) or components(as in FPGAs) to fit into the target technology.
Basically the synthesis tools convert the design description into equations or components
2. Differences between latches & flipflops?
There are 2 types of circuits:
1. Combinational
2. Sequential
Latches and flipflops both come under the category of "sequential circuits", whose output depends not only on the current inputs but also on previous inputs and outputs.
Difference: Latches are level-sensitive, whereas, FF are edge sensitive.
By edge sensitive, I mean O/p changes only when there is a clock transition.
( from 1 to 0 or from 0 to 1)
Example: In a flipflop, inputs have arrived on the input lines at time= 2 seconds. But, the output won't change immediately. At time = 3 seconds, clock transition takes place. After that, O/P will change.
Flip-flops are of 2 types:
1. Positive edge triggered
i)Simulation <= verify your design.
Simulation is used to verify the functionality of the circuit.
a)Functional Simulation: a study of ckt's operation independent of timing parameters and gate delays.
b) Timing Simulation: study including estimated delays, verify setup, hold and other timing requirements of devices like flip-flops are met.
ii)Synthesis <= Check for your timing
Synthesis: One of the foremost in back-end steps whereby synthesizing is nothing but converting VHDL or VERILOG description to a set of primitives (equations as in CPLD) or components(as in FPGAs) to fit into the target technology.
Basically the synthesis tools convert the design description into equations or components
2. Differences between latches & flipflops?
There are 2 types of circuits:
1. Combinational
2. Sequential
Latches and flipflops both come under the category of "sequential circuits", whose output depends not only on the current inputs but also on previous inputs and outputs.
Difference: Latches are level-sensitive, whereas, FF are edge sensitive.
By edge sensitive, I mean O/p changes only when there is a clock transition.
( from 1 to 0 or from 0 to 1)
Example: In a flipflop, inputs have arrived on the input lines at time= 2 seconds. But, the output won't change immediately. At time = 3 seconds, clock transition takes place. After that, O/P will change.
Flip-flops are of 2 types:
1. Positive edge triggered
2. negative edge triggered
1) Flip-flops take twice the number of gates as latches
2) so automatically delay is more for flipflops
3) power consumption is also more
# Imp: latch does not have a clock signal, whereas a flip-flop always does.
3. What is slack?
The slack is the time delay difference from the expected delay(1/clock) to the actual delay in a particular path.
Slack may be +ve or -ve.
4. RTL and Behavioral
1) Flip-flops take twice the number of gates as latches
2) so automatically delay is more for flipflops
3) power consumption is also more
# Imp: latch does not have a clock signal, whereas a flip-flop always does.
3. What is slack?
The slack is the time delay difference from the expected delay(1/clock) to the actual delay in a particular path.
Slack may be +ve or -ve.
4. RTL and Behavioral
i) Register transfer language means there should be data flow between two registers and logic is in between them for end registers data should flow.
ii) Behavioral means how hardware behave determine the exact way it works we write using HDL syntax.For complex projects it is better mixed approach or more behavioral is used.
5. Equivalence between VHDL and C?
i)There is a concept of understanding in C there is structure. Based upon requirement structure provide facility to store the collection of different data types.
ii) In VHDL we have direct access to memory so instead of using a pointer in C (and member of structure) we can write interface to store data in memory and access it.
ii) Behavioral means how hardware behave determine the exact way it works we write using HDL syntax.For complex projects it is better mixed approach or more behavioral is used.
5. Equivalence between VHDL and C?
i)There is a concept of understanding in C there is structure. Based upon requirement structure provide facility to store the collection of different data types.
ii) In VHDL we have direct access to memory so instead of using a pointer in C (and member of structure) we can write interface to store data in memory and access it.
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