The Logic type :
1. In verilog we use two reg and wire for driving a port and connecting a block respectively .
2.Wire is used to connect gates or modules and are physical wire in a circuit and it must be driven by a continues assignment statements.
3.“Reg” in Verilog is a data object that holds its value from one procedural statement to next. When we say "reg (register datatype)" it does not mean the register in the hardware or a physical register in circuit. This is the common mistake or assumption mostly engineers thinks while learning Verilog.
4.In SV reg and wire are replaced with a single data type that is logic.
5.It is 4 state (1, 0, X, Z) System Verilog data type.
6.“logic” signal can be used anywhere a “net” used but there is one exception to this, you can not drive logic variable from multiple driver. Logic type can only have a single drive,
1. In verilog we use two reg and wire for driving a port and connecting a block respectively .
2.Wire is used to connect gates or modules and are physical wire in a circuit and it must be driven by a continues assignment statements.
3.“Reg” in Verilog is a data object that holds its value from one procedural statement to next. When we say "reg (register datatype)" it does not mean the register in the hardware or a physical register in circuit. This is the common mistake or assumption mostly engineers thinks while learning Verilog.
4.In SV reg and wire are replaced with a single data type that is logic.
5.It is 4 state (1, 0, X, Z) System Verilog data type.
6.“logic” signal can be used anywhere a “net” used but there is one exception to this, you can not drive logic variable from multiple driver. Logic type can only have a single drive,
7. This means we can declare all signal as logic to find if is there any multiple driver issue. Because in this case you should be able to see compilation issue if there is any multiple driver by declaring all signal with type “logic”.
8. The signal you would like to have multiple drivers shall be declared as net type such as “wire” or “tri”
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